Linear NPO
Linear Near-Packaged Optics (NPO) places optical engines adjacent to the switch ASIC, enabling DSP-free optical interconnects with lower power consumption, higher bandwidth density, and improved signal integrity for next-generation AI and cloud data centers.
Advancing NPO Optical Engines to 800G and 1.6T
Near-Packaged Optics (NPO) places optical engines adjacent to the switch ASIC, reducing electrical channel loss while improving power efficiency and signal integrity.
Powered by FIBERSTAMP’s proven 400G DR4 Linear Silicon Photonics engine, the NPO platform is evolving to 800G and 1.6T for scalable AI, cloud, and hyperscale data center networks.
Product Description
The 400G DR4 Linear NPO Silicon Photonic Engine leverages linear direct-drive technology to deliver a high-performance, energy-efficient optical interconnect solution for next-generation AI and cloud data centers.
Compared with conventional NPO architectures, the Linear NPO Silicon Photonic Engine eliminates onboard DSPs through a linear direct-drive architecture, significantly reducing system-level power consumption, latency, and overall deployment cost.
Key Performance
Output Power: 0-3dBm (Typical: 4-5dB)
TDECQ: <2.5dB (Typical: 1-2dB)
Wavelength Range: 1304.5nm – 1317.5nm; SMSR ≤30dB
Sensitivity: <5.5dBm
Application Scenarios
Lower power consumption and enhanced system interconnection reliability, enabling next-generation DSP-free switches.
Designed to address system signal consistency and reliability challenges,combining the advantages of Linear Pluggable Optics (LPO) and Near-Packaged Optics (NPO).This cutting-edge solution paves the way for the future of high-speed, energy-efficient data transmission.
The XT-1.6T DR16/DR16+ Linear NPO Silicon Photonic Engine is a high-performance optical interconnect solution designed for next-generation AI data centers and high-performance computing (HPC) applications.
Built on a Near-Packaged Optics (NPO) architecture, it positions the optical engine adjacent to the switch ASIC, enabling 1.6Tbps optical connectivity through DR16/DR16+ interfaces. Leveraging a DSP-free linear architecture, the engine delivers high bandwidth, low power consumption, low latency, and improved signal integrity, making it an ideal solution for next-generation AI and cloud infrastructure.
Key Features:
Supports 16 × 100G PAM4 signaling (53 Gbaud per lane)
Advanced Silicon Photonic Modulator chip
Integrated Linear Driver and TIA
Power consumption <16 W
Up to 2 km transmission over 1310 nm single-mode fiber
High-performance External Laser Source (ELS)
Electrical Interface: OIF CEI-112G-XSR
Mechanical Interface: OIF Co-Packaging 3.2T Module 1.0
Management Interface: OIF CMIS 5.3