A Hybrid Half-DSP Architecture for 800G and 1.6T Optical Interconnects

As optical interconnects transition from 800G to 1.6T, the industry continues to evaluate architectures that balance the ultra-low power of LPO/LRO with the signal compensation and link robustness of full-DSP solutions.

FIBERSTAMP’s Hybrid Half-DSP architecture combines retimed and linear-receive channels within the same optical interface, providing a differentiated approach that balances power efficiency, link controllability, and transmission robustness.

The architecture is based on a heterogeneous channel design in which some channels retain independent RX-DSP compensation and clock recovery, while the remaining channels use a linear-receive architecture and rely on the switch SerDes for clock recovery.

 Hybrid Retimed-Channel Architecture

Unlike the conventional all-linear or all-DSP approach, the Hybrid architecture combines two different channel implementations within the same optical link.

 Four RX-DSP Retimed Channels

The four retimed channels complete clock recovery within the optical module.

Signal path:

Optical Signal → PD → TIA → ADC → RX DSP → Recovered Data

The ADC samples the received analog signal using a locally free-running high-speed clock. The RX DSP continuously compares the sampled data with the expected data phase and calculates the phase error.

Through digital loop filtering, the sampling-clock phase is dynamically adjusted to align with the signal transition edges. The recovered clock and clean data stream are then output by the RX DSP.

At the same time, error statistics and jitter margin can be monitored, with diagnostic information reported through CMIS.

Four Linear-Receive Channels

The four linear channels do not use an ADC, on-chip RX DSP, or module-side CDR.

Signal path:

Optical Signal → PD → Linear TIA → High-Speed Analog Electrical Signal → Switch ASIC

Each SerDes lane inside the switch has its own CDR and independently captures the signal edges to complete clock-phase locking.

In the standard independent mode, the clocks of the eight channels operate independently without referencing one another.

System-Level Coordinated Mode

The Hybrid architecture also supports a coordinated operating concept at the system level.

With support from switch-level algorithms, the four module-side DSP channels can first establish a stable set of reference clock and phase information. The switch ASIC can then use this validated reference information as an initial phase prediction and jitter constraint for the CDRs of the four linear channels.

This approach reduces the phase-search range for the linear channels, enabling faster clock recovery while helping reduce clock offset and jitter variation across parallel channels.

The result is a heterogeneous architecture in which retimed and linear channels work together rather than operating as completely independent link implementations.

Hybrid Architecture vs. Conventional Approaches

The Hybrid approach provides an alternative to the conventional choice between pure linear optics and full-DSP architectures.

Pure Linear Solutions

Linear solutions provide power advantages, but are more sensitive to link margin and depend strongly on cabling quality and switch-chip capabilities.

Full-DSP Solutions

Full-DSP solutions provide strong signal recovery and link stability, but require higher overall system power and processing resources.

Hybrid Half-DSP Architecture

The Hybrid architecture combines both approaches within the same optical interface.

Some channels retain independent signal compensation and link diagnostic capabilities, while the remaining channels use linear reception to reduce power consumption.

This creates a balance among performance, power consumption, and operational controllability.

FIBERSTAMP Hybrid Optical Interconnect Portfolio

FIBERSTAMP applies this Hybrid retimed-channel concept to a portfolio of high-speed optical interconnect products:

• 1.6T OSFP-HRO 2×DR4 Silicon Photonics Transceiver

• 800G OSFP-HRO 2×DR4 Silicon Photonics Transceiver

• 800G OSFP HYBRID VR8-AOC Active Optical Cable

• 800G OSFP HYBRID PSM8-AOC Active Optical Cable

FIBERSTAMP’s Hybrid Half-DSP heterogeneous silicon photonics transceivers adopt a differentiated channel architecture: four channels retain full RX-DSP compensation capability, while the other four channels employ a linear-receive architecture with DSP pre-emphasis on the transmit side.

The portfolio covers two major form factors: 800G/1.6T OSFP-HRO 2×DR4 and HYBRID PSM8-AOC.

These products translate the Hybrid channel architecture into testable, scalable, and mass-producible optical interconnect solutions.

A Practical Path Between Linear and Full-DSP Architectures

The key difference between a Hybrid linear channel and a conventional LRO channel is the combination of retimed and linear channels within the same system architecture.

Pure LRO relies on host-side clock recovery for its linear channels, while the Hybrid approach retains dedicated DSP-based clock recovery and compensation on selected channels and uses those channels as part of a broader system-level architecture.

FIBERSTAMP’s Hybrid Half-DSP technology therefore provides a practical approach to balancing power efficiency, link robustness, and system-level control for next-generation 800G and 1.6T optical interconnects.